iEDA Software Framework

Code Structure

• iEDA Code Repository Structure

iEDA Design Structure

iEDA Framework

• Emphasize the construction of infrastructure to support a wider range of design requirements and EDA research and development, and support the full-process design from RTL to GDSII;
• Improve the quality and performance of each stage of EDA tools, and realize the data analysis and visualization of the tool execution process;
• Build an AI-driven EDA platform to facilitate third parties to train AI models for solving EDA tasks and introduce AI models into the EDA platform;
• Support more chip designs, build a database system, and generate a sufficient amount of labeled data;
• Add cloud-native support to the EDA platform, provide computing power, and support more users to design chips and research and develop EDA technologies.

iEDA Architecture

• iEDA mainly conducts research around open-source EDA tools, intelligent chip design methods, open-source EDA system platforms, and open-source EDA benchmark test sets, creating a four-in-one AI+EDA technology ecosystem (problems, data, platform, computing power), developing open-source and open chip design solutions, improving chip design efficiency, improving chip design quality, reducing the chip design threshold by orders of magnitude, attracting and promoting innovation and entrepreneurship in the chip field, cultivating chip professionals, and promoting the diversified development of the chip industry.
• The iEDA architecture mainly includes analysis, applications, databases, evaluation, interfaces, operations, platforms, solvers, utilities, and third parties. You can visit our gitee and github open-source links for detailed information: https://gitee.com/oscc-project/iEDA

iEDA Foundation Base

• Goal: Four layers of abstraction - Foundation base - Data model - Key algorithms - EDA functions.
• Content: File system, parser, database, auxiliary library, evaluator, optimizer, manager, GUI interface and other user interaction modules.

iEDA Platform Evolution

• EDA, as a tool for chip design, is known as the "crown jewel" of the semiconductor industry. With the continuous development of artificial intelligence, the development of traditional EDA tools has struggled to keep up with the increasing scale of chip design and market demand. The industry has been exploring more effective solutions to improve the efficiency of chip design and lower the design threshold. The adoption of artificial intelligence technology in EDA tools has become the key to EDA technological innovation today.
• In traditional EDA design tools, the human effort in chip architecture exploration, design, verification, layout and routing, etc. is huge. To significantly reduce manpower and resources and shorten the design cycle, EDA design tools are gradually evolving towards an intelligent trend. Utilizing artificial intelligence means and methods such as deep learning and reinforcement learning, and absorbing past design experience and data to form a new methodology of intelligent EDA design. Intelligent EDA design can effectively reduce human input, shorten the design cycle, and improve the performance and accuracy of chip design and production. Today, the number of transistors in chips, often in the hundreds of millions, and the complexity all indicate that system complexity will usher in a new era of the chip design industry. And artificial intelligence will play an important role in it. Artificial intelligence technology means represented by machine learning will change the way of chip design and verification.
• The main research directions of the platform:
  • AI+EDA, exploring the use of AI methods to achieve intelligent chip design;
  • Build an EDA data set to assist in EDA technology research and AI model training;
  • Build an open-source EDA platform to connect the open-source chip design process;
  • Use open-source EDA tools to build open-source and open chip design solutions.